著者

Kaita Imai Keita Yasutomi Keiichiro Kagawa Shoji Kawahito

出版者

一般社団法人 電子情報通信学会

雑誌

IEICE Electronics Express (ISSN:13492543)

巻号頁・発行日

vol.9, no.24, pp.1893-1899, 2012-12-28 (Released:2012-12-28)

参考文献数

4

被引用文献数

2

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This paper proposes a distributed ramp signal generator of column-parallel single-slope ADCs for CMOS image sensors. This architecture does not require any power-hungry amplifiers of the conventional one but consists of miniaturized column-wise ramp signal generators connected together by metal wires, which achieves high linearity and high uniformity. Simulation results show less than 1LSB nonlinear error of the ramp signal at 12-bit ADC resolution is attained only by having the consumption current of 6.4mA and the area of 2.4mm2 which are much smaller than the conventional one. It is also confirmed that 100mΩ resistive connection attains less than 1LSB gain error mismatching, even though the mismatch of the column-wise ramp signal generators is as large as 20%.