著者

Fukashi MORISHITA Wataru SAITO Norihito KATO Yoichi IIZUKA Masao ITO

出版者

The Institute of Electronics, Information and Communication Engineers

雑誌

IEICE TRANSACTIONS on Electronics (ISSN:09168516)

巻号頁・発行日

vol.E105-C, no.7, pp.316-323, 2022-07-01

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This paper proposes novel test techniques for high accuracy measurement of ADCs and a ramp generator on a CMOS image sensor (CIS) chip. The test circuit for the ADCs has a dual path and has an ability of multi-functional fine pattern generator that can define any input for each column to evaluate CIS specific characteristics electrically. The test circuit for the ramp generator can realize an on-chip current cell test and reject the current cell failure within 1LSB accuracy. We fabricated the test sensor using 55nm CIS process and measured the IP characteristics. Measured results show INL of 14.6LSB, crosstalk of 14.9LSB and column interference noise of 5.4LSB. These measured results agree with the designed values. By using this technique, we confirmed the accurate ADC measurement can be realized without being affected by the ambiguity of the optical input.