著者

Kashfi Fatemeh Agah Amir Fakhraie S. Mehdi Safari Saeed

出版者

The Institute of Electronics, Information and Communication Engineers

雑誌

IEICE Electronics Express (ISSN:13492543)

巻号頁・発行日

vol.4, no.22, pp.696-700, 2007

被引用文献数

1

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We describe a high speed adder that employs a carry-lookahead structure and uses low-voltage-swing pass-transistor-based Manchester carry chain. This structure is implemented in 65nm technology and accommodates 15GHz clock frequency at the slowest corner which is 20% higher than the highest speed in the previously studied high-speed structures.