- 著者
- Hikichi Takafusa Matoba Ryo Ikeda Takashi Watanabe Akira Yamamoto Takuya Yoshitake Satoko Tamura-Nakano Miwa Kimura Takayuki Kamon Masayoshi Shimura Mari Kawakami Koichi Okuda Akihiko Okochi Hitoshi Inoue Takafumi Suzuki Atsushi Masui Shinji
- 出版者
- National Academy of Sciences
- 雑誌
- Proceedings of the National Academy of Sciences of the United States of America (ISSN:10916490)
- 巻号頁・発行日
- 2013-04-02
- 被引用文献数
- 31
初期化を阻害する転写因子が分化を促進する. 京都大学プレスリリース. 2013-04-02.
- 著者
- Shiraki Hiromitsu Kimura Takayuki
- 出版者
- 一般社団法人映像情報メディア学会
- 雑誌
- 映像情報メディア学会誌 : 映像情報メディア (ISSN:13426907)
- 巻号頁・発行日
- vol.57, no.3, pp.391-397, 2003-03-01
Conventional CCD registers for full frame or frame transfer scheme image sensors have disadvantages such as low light sensitivity due to light absorption in electrodes, high dark current generated at Si-SiO_2 interfaces, and small charge handling capability that results from the surface pinning mode of operation. To solve these problems, we proposed CCD register driven through a barrier in February 2000. The register cell was an inverted version of the photo-diode with a vertical overflow drain that is used as the driving electrode. In simulating the register's characteristics in back illumination mode, we found that all the above-disadvantages disappeared, but the characteristics were rather sensitive to the height, width, and location of SiO_2 film required to isolate electrodes. Therefore, some difficulty remains in fabrication processes. This paper proposes a new version of DTB-CCD where a specific-feature SiO_2 layer covers a part of the barrier surface. This layer not only helps to minimize the structure sensitiveness of performance but also makes it possible to employ the conventional overlapping poly-Silicon electrode process. A thin SiO_2 layer between electrodes and optimized width and thickness of the SiO_2 layer on the barrier minimizes potential barrier height in channels and thus improve transfer efficiency. The simulated charge handling capability of the improved DTB-CCD was 3〜4 times greater than that of a two-phase CCD register driven by surface pinning mode.