著者
Flora Somidin Stuart David McDonald Xiaozhou Ye Dongdong Qu Keith Sweatman Tetsuya Akaiwa Tetsuro Nishimura Kazuhiro Nogita
出版者
The Japan Institute of Electronics Packaging
雑誌
Transactions of The Japan Institute of Electronics Packaging (ISSN:18833365)
巻号頁・発行日
vol.13, pp.E19-004-1-E19-004-11, 2020 (Released:2020-05-27)
参考文献数
29
被引用文献数
4

The polymorphic transformation that occurs in the Cu6Sn5 intermetallic compound (IMC) at 186°C has the potential to generate stresses that could lead to cracking of that phase in soldered joints during the multiple reflow cycles of a typical printed board assembly process and the thermal cycles to which electronic assemblies are exposed during service. In this paper the authors report on the effect of variations in the cooling stage of a reflow soldering thermal profile on the incidence and extent of cracking in the Cu6Sn5 at the interface between solder alloys and copper substrates. The solder alloy/substrate combinations studied were Sn-3.0Ag-0.5Cu/Cu and Sn-0.7Cu-0.05Ni-1.5Bi/Cu. The cooling conditions were (i) the direct-cooling of a conventional reflow profile, and (ii) an alternative reflow profile with one of three extended isothermal holding periods of 30, 60, and 180 seconds at 140°C during the cooling stage. It was found that the alternative reflow profiles reduced cracking in the interfacial Cu6Sn5 IMC layer and this resulted in improved resistance of the reflowed solder ball to failure in high speed impact shear when the distribution of stress tends to favor crack propagation though the interfacial IMC rather than through the bulk solder.
著者
Hiroyuki Kuwae Kosuke Yamada Takumi Kamibayashi Wataru Momose Shuichi Shoji Jun Mizuno
出版者
The Japan Institute of Electronics Packaging
雑誌
Transactions of The Japan Institute of Electronics Packaging (ISSN:18833365)
巻号頁・発行日
vol.13, pp.E19-014-1-E19-014-9, 2020 (Released:2020-03-01)
参考文献数
31
被引用文献数
3

A low-temperature Cu–Cu bonding technique using a thin metal intermediate layer deposited by atomic layer deposition (ALD) was developed. A thin Pt intermediate layer was selectively deposited on the Cu surface at the angstrom level by ALD without any mask under low vacuum conditions (24 Pa). To suppress the deterioration of bonding reliability caused by impurities at the bonding interface, quasi-direct bonding was realized by using a thin Pt intermediate layer. The Cu–Cu quasi-direct bonding with a thin Pt layer provided a bonding strength of 9.5 MPa, which was five times higher than that without the intermediate layer (1.9 MPa). These results will contribute to the development of low-temperature Cu–Cu bonding for three-dimensional integrated circuit chips.
著者
Koichi Takemura Daisuke Ohshima Akihiro Noriki Daisuke Okamoto Akio Ukita Jun Ushida Masatoshi Tokushima Takanori Shimizu Ichiro Ogura Daisuke Shimura Tsuyoshi Aoki Takeru Amano Takahiro Nakamura
出版者
The Japan Institute of Electronics Packaging
雑誌
Transactions of The Japan Institute of Electronics Packaging (ISSN:18833365)
巻号頁・発行日
vol.15, pp.E21-012-1-E21-012-13, 2022 (Released:2022-04-25)
参考文献数
25
被引用文献数
5

We propose silicon (Si)-photonics-embedded interposers as a novel packaging platform to achieve co-packaged optics. An interposer is an organic substrate that has Si-photonics transceiver dies buried in it and polymer optical waveguides connecting the embedded Si chips and optical connectors. We also developed a Si-photonics-device-embedding process and investigated the properties and operations of embedded Si-photonics devices as a feasibility study. The embedded arrayed waveguide grating and reflective optical filter showed a wavelength shift on the order of 0.1 nm with our embedding process. The shifts seem to be due to the difference in ambient temperature during the measurements and induced strain. Though this embedding process is presumed to affect the spectrum for Si-photonics devices, the difference is small enough to be controlled. Embedded Si-photonics transmitter- and receiver-integrated circuits successfully demonstrated 25-Gb/s operations. The proposed Si-photonics-embedded interposer is a promising candidate for a co-packaged optics platform to eliminate the interconnect bandwidth bottleneck for high-performance computing systems.
著者
Kazuhiro Nogita Mathew C. Greaves Benjamin D. Guymer Bernard B. Walsh James M. Kennedy Michael D. Duke Tetsuro Nishimura
出版者
The Japan Institute of Electronics Packaging
雑誌
Transactions of The Japan Institute of Electronics Packaging (ISSN:18833365)
巻号頁・発行日
vol.3, no.1, pp.104-109, 2010 (Released:2011-04-21)
参考文献数
10
被引用文献数
3 5

The authors produced a demonstration electric vehicle, "Deep Green Research," based on a Honda Civic, in which critical electrical connections were soldered with a lead-free Sn–Cu–Ni–Ge alloy. This paper reports on the team's participation and completion in the Global Green Challenge, the world's largest solar car and eco car race, from Darwin to Adelaide, Australia that was run in late October, 2009. The successful completion of this course under the harsh conditions of the Australian outback proved the high reliability of the Sn–Cu–Ni–Ge lead-free solder joints in the control panels, cables, and connectors that had to carry the heavy current required to propel the vehicle over long distances at speeds of up to 104 km/hour. The vehicle set a new record for the longest distance travelled on a single charge by a car that satisfies relevant Australian safety regulations. This distance of 360 km was achieved using lithium-ion batteries with a total capacity of 33 kWh and resulted in an award in the category "Modified Production Class — Small Car (Electric)".