著者
小川 将司
出版者
Hokkaido University(北海道大学)
巻号頁・発行日
2015-03-25

Recently, inverters which are the key technology component in power electronics are widely used in many fields for energy saving. The switching speed of next-generation switching devices is expected to improve to 10-fold that of conventional Si IGBTs by using wide band gap semiconductors, which are SiC and GaN. These devices can improve PWM inverter carrier frequency which is difficult to operate conventional inverters. High-frequency PWM inverter can output high response waveform and be downsized. However, High-frequency PWM inverters will increase output voltage distortion and EMI(electromagnetic interference). Major reasons of these problems are dead-time and common-mode voltage. Dead-time is essential for inverters to prevent a short circuit induced by delaying the time of devices. Dead-time generates output voltage error which is proportional to the carriar frequency. Common-mode current, which caused by common-mode voltage, flows through the loop consisting of main circuit, ground-line and power source. Therefore, common-mode current injects into other devices connecting to same power source and causes conducted EMI. Furthermore, the high-frequency common-mode current flowing in the main circuit may cause radiated EMI. To solve above problems, this paper describes the following topics using 100 kHz PWM inverter. 1. A novel feedback-type dead-time compensation method with high-speed and high-response is proposed. The basic operation of proposed method is matching the pulse width of the output signal to that of input signal. If the short pulses, which are shorter than minimum output pulse of PWM inverter, are input, proposed method generates an output pulse after a few input pulses so that the average voltage of output signal equal to the input signal. Therefore, proposed method has no compensation limit theoretically. Experimental result using PWM signal shows that proposed method has low voltage distortion and high-voltage utilization factor characteristics. 2. To cancel the common-mode voltage which causes common-mode noise, active common-noise canceler(ACC) is applied to 100 kHz PWM inverter. An ACC for 100 kHz PWM inverter is designed and constructed for compare with an ACC for 10 kHz PWM inverter. Although the weight of a part of the ACC for 100 kHz PWM inverter is 16% of that of the ACC for 10 kHz PWM inverter, the prototype ACC cancels the common-mode voltage equivalent to the ACC for 10 kHz PWM inverter. A new circuit configuration of the ACC for 100 kHz SVPWM inverter is proposed. A new circuit configuration has small size because it operates without another power supply and large parts. Combination of above 2 methods, high-frequency PWM inverter reducing distortion and noise will be developed.
著者
小川 将司 小笠原 悟司 竹本 真紹
出版者
一般社団法人 電気学会
雑誌
電気学会論文誌. D, 産業応用部門誌 = The transactions of the Institute of Electrical Engineers of Japan. D, A publication of Industry Applications Society (ISSN:09136339)
巻号頁・発行日
vol.133, no.10, pp.970-977, 2013-10-01
参考文献数
16
被引用文献数
1

This paper proposes a new feedback-type dead-time compensation method. The proposed method compensates the output voltage by employing two operations. First, the normal compensation matches the width of the output pulse to that of the input pulse with reduced delay time from the input pulse to the output pulse compared with the conventional method. Second, the short pulse compensation generates an output pulse after a few pulses are input so that the average value of the output signal equals that of the input signal. The voltage utilization factor of the proposed method is almost 100%, because there is no limit to the compensation and the decrease in the fundamental output caused by dead time is eliminated. The experimental results using a 100-kHz input signal show that there is no discrepancy between the output pulse width and the input pulse width. Furthermore, the THD of the compensated output current, when the output frequency is 50Hz, is eliminated, compared with that of the output current without compensation. These results show that the proposed method has low distortion and high voltage utilization factor characteristics.