著者

Zhiqiang Wang Xin Liu Zhiqiang Li Xiaosong Wang Minghua Wang Quan Li Yan Li Yu Liu

出版者

The Institute of Electronics, Information and Communication Engineers

雑誌

IEICE Electronics Express (ISSN:13492543)

巻号頁・発行日

vol.19, no.23, pp.20210286, 2022-12-10 (Released:2022-12-10)

参考文献数

35

被引用文献数

1

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This paper presents a four-way current-combining Ka-band power amplifier (PA) in 65-nm CMOS technology. A symmetrical, transmission line based four-way current combiner, together with output transformers, is used to transfer the high load impedance (4*ZL) to the desired Zopt for each power unit cell. Besides, both interstage/input flexible matching transformers and the power splitter are optimized to improve the performance. Based on the methodology mentioned above, the power amplifier demonstrates a small-signal gain of about 24.12 dB, a saturated output power of 21.56 dBm, and a peak power-added efficiency of 27.3% at 35GHz.