著者
Kim Yoon Shim Won Park Byung-Gook
出版者
Institute of Physics
雑誌
Jpn. J. Appl. Phys. (ISSN:00214922)
巻号頁・発行日
vol.54, no.6, 2015-05-26
被引用文献数
2

In this paper, we report the fabrication and analysis of the gated twin-bit NAND flash memory with a nitride charge-trapping layer. This device is based on the recessed channel structure, and it has an additional cut-off gate that enables 2-bit operation. Therefore, the density of the array can be doubled without any difficulty in patterning. The fabrication method for gated twin-bit (GTB) silicon–oxide–nitride–oxide–silicon (SONOS) memories and their electrical characteristics are described in this paper. Program/erase characteristics are observed and the 2-bit operation is verified by the forward–reverse reading scheme.