著者
Zhaohao Zeng Ruihua Song Pingping Lin Tetsuya Sakai
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.27, pp.742-751, 2019 (Released:2019-11-15)
参考文献数
37

We tackle Attitude Detection, which we define as the task of extracting the replier's attitude, i.e., a target-polarity pair, from a given one-round conversation. While previous studies considered Target Extraction and Polarity Classification separately, we regard them as subtasks of Attitude Detection. Our experimental results show that treating the two subtasks independently is not the optimal solution for Attitude Detection, as achieving high performance in each subtask is not sufficient for obtaining correct target-polarity pairs. Our jointly trained model AD-NET substantially outperforms the separately trained models by alleviating the target-polarity mismatch problem. By employing pointer networks to consider the target extraction task a boundary prediction problem instead of a sequence labelling problem, the model obtained better performance and faster training/inference than LSTM and LSTM-CRF based models. Moreover, we proposed a method utilising the attitude detection model to improve retrieval-based chatbots by re-ranking the response candidates with attitude features. Human evaluation indicates that with attitude detection integrated, the new responses to the sampled queries are statistically significantly more consistent, coherent, engaging and informative than the original ones obtained from a commercial chatbot.
著者
Joseph Korpela Ryosuke Miyaji Takuya Maekawa Kazunori Nozaki Hiroo Tamagawa
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.24, no.2, pp.302-313, 2016 (Released:2016-03-15)
参考文献数
26
被引用文献数
2 7

This paper presents a method for evaluating toothbrushing performance using audio data collected by a smartphone. This method first conducts activity recognition on the audio data to classify segments of the data into several classes based on the brushing location and type of brush stroke. These recognition results are then used to compute several independent variables which are used as input to an SVM regression model, with the dependent variables for the SVM model derived from evaluation scores assigned to each session of toothbrushing by a dentist who specializes in dental care instruction. Using this combination of audio-based activity recognition and SVM regression, our method is able to take smartphone audio data as input and output evaluation score estimates that closely correspond to the evaluation scores assigned by the dentist participating in our research.
著者
Mitsuo Saito Takeshi Aikawa Tsukasa Matoba Mitsuyoshi Okamura Kenji Minagawa Tadatoshi Ishii
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.13, no.2, pp.144-149, 1990-08-25

The CPU of the AI processor (AIP) called IP704 was developed for Prolog and Lisp based on RISC architecture with hardware supports. It has been proved that IP704 architecture is effective for both AI languages and general-purpose languages. An AI processor chip (IP 1704) is being developed as a direct successor of the IP704. The architecture has been modified and refined to fit onto a single chip and to improve the execution speed. Features newly developed for the IP1704 include Overlapping of the decode and register-read stages using a combination of the hardware decoder and micro-programs and a delayed cache hit check with delayed writing. Is shown that a RISC-based processor with suitable hardware support is applicable to VLSI and also gives high performance AI languages.
著者
Yasushi Hibino Kazufumi Watanabe Ikuo Takeuchi
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.13, no.2, pp.156-164, 1990-08-25

This paper describes a 32-bit LISP processor chip developed for the AI workstation ELIS with the multiple programming paradigm language TAO. The objective of this microprocessor is to realize an S-expression machine that can match the speed of conventional machines for compiled code execution. Architectural features are a repetitive structure for VLSI implementation of the tagged architecture and a dedicated datapath for list manipulation. All the processor functions are realized on a single VLSI chip that uses a 2-micron CMOS process. ELIS supports not only LISP but also multiple programming paradigms. The ELIS interpreter has a higher performance than that of any other dedicated machine on the market.
著者
Bo Sun Xiapu Luo Mitsuaki Akiyama Takuya Watanabe Tatsuya Mori
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.26, pp.212-223, 2018 (Released:2018-02-15)
参考文献数
40
被引用文献数
3

Mobile app stores, such as Google Play, play a vital role in the ecosystem of mobile device software distribution platforms. When users find an app of interest, they can acquire useful data from the app store to inform their decision regarding whether to install the app. This data includes ratings, reviews, number of installs, and the category of the app. The ratings and reviews are the user-generated content (UGC) that affect the reputation of an app. Therefore, miscreants can leverage such channels to conduct promotional attacks; for example, a miscreant may promote a malicious app by endowing it with a good reputation via fake ratings and reviews to encourage would-be victims to install the app. In this study, we have developed a system called PADetective that detects miscreants who are likely to be conducting promotional attacks. Using a 1723-entry labeled dataset, we demonstrate that the true positive rate of detection model is 90%, with a false positive rate of 5.8%. We then applied our system to an unlabeled dataset of 57M reviews written by 20M users for 1M apps to characterize the prevalence of threats in the wild. The PADetective system detected 289K reviewers as potential PA attackers. The detected potential PA attackers posted reviews to 136K apps, which included 21K malicious apps. We also report that our system can be used to identify potentially malicious apps that have not been detected by anti-virus checkers.
著者
Tom Altman Yoshihide Igarashi
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.12, no.2, pp.154-158, 1989-08-25

We study sequential and parallel algorithms on roughly sorted sequences. A sequence a = (a_l a_2 . . . a_n) is k-sorted if for all 1&les;i j&les;n i<j- k implies a_i&les;a_j. We first show a real-time algorithm for determining if a given sequence is k-sorted and an O(n)-time algorithm for finding the smallest k for a given sequence to be k-sorted. Next we give two sequential algorithms that merge two k-sorted sequences to form a k-sorted sequence and completely sort a k-sorted sequence. Their running times are O(n) and O(n log k) respectively. Finally parallel versions of the complete-sorting algorithm are presented. Their parallel running times are O(f(2k) 1og k) where f(t) is the computing time of an algorithm used for finding the median among t elements.
著者
Fuyumasa Takatsu Kohei Hiraga Osamu Tatebe
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.25, pp.438-447, 2017 (Released:2017-06-15)
参考文献数
36
被引用文献数
2

The fusion of the research field of high-performance computing (HPC) with that of big data, which has become known as the field of extreme big data, is problematic in that file creation in storage systems such as distributed file systems is not optimized. That is, the large workload leads to simultaneous creations of many files by many processes when creating checkpoints. The need to improve the file creation processes prompted us to design a scale-out distributed file system for post-petascale systems named PPFS. PPFS consists of PPMDS, which is a scale-out distributed metadata server, and PPOSS, which is a scalable distributed storage server for flash storage. The high file creation performance of PPMDS was achieved by using a key-value store for metadata storage and non-blocking distributed transactions to update multiple entries simultaneously. PPOSS depends on PPOST, which is an object storage system that manages the underlying low-level storage, such as Fusion IO ioDrive, a flash device connected through PCI express supporting OpenNVM. The high file creation performance was attained by implementing the PPFS prototype using file creation optimization, termed bulk creation, to reduce the amount of communication between PPMDS and PPOSS. And, to enhance the I/O performance of PPOSS when the client process and PPOSS run on the same node, PPOSS accesses a local storage device directly. The prototype implementation of PPFS with a further file creation optimization called object prefetching achieves 138, 000 Operations Per Second for file creation when using five metadata servers and 128 client processes, thereby exceeding the performance of IndexFS by 2.52 times. With local access optimization, PPOSS reached its limit at a block size of 16KiB, which is an improvement of 1.5 times compared to before optimization. Furthermore, this evaluation indicates that PPFS has a good scalability on file creation and IO performance, that is required for post-petascale systems.
著者
Yasuhiko Asao Erik D. Demaine Martin L. Demaine Hideaki Hosaka Akitoshi Kawamura Tomohiro Tachi Kazune Takahashi
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.25, pp.590-600, 2017 (Released:2017-08-15)
参考文献数
6

We show how to fold a piece of paper and punch one hole so as to produce any desired pattern of holes. Given n points on a piece of paper (finite polygon or infinite plane), we give algorithms to fold the paper flat so that those n points and no other points of paper map to a common location, so that punching one hole and unfolding produces exactly the desired pattern of holes. Furthermore, we can forbid creases from passing through the points (allowing noncircular hole punches). Our solutions use relatively few creases (in some cases, polynomially many), and can be expressed as a linear sequence of folding steps of complexity O(1)—a generalization of simple folds which we introduce.
著者
Hiroshi Yamada Kazuya Murao Tsutomu Terada Masahiko Tsukamoto
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.26, pp.38-47, 2018 (Released:2018-01-15)
参考文献数
15
被引用文献数
1

Competitive karuta is an official Japanese card game and is described as “martial art on the tatami.” Recently, competitive karuta has attracted a great deal of attention among young people. One of characteristic rules of competitive karuta is that there is no referee; therefore players must judge themselves even if the difficult situation arises. Consequently, the players sometimes get into an argument over their judgement, which disrupts the other matches in the room because all the matches proceed in parallel. In this paper, we propose a system that judges the player who took a card first in a competitive karuta match. Our system measures motion data when players take a card by using a wrist-worn accelerometer and gyroscope, and estimates the times when the players touched the card. From the evaluation experiments, 69.2% of rounds were estimated without error and 99.0% of rounds were estimated within 20-ms error. When our system was introduced on the close game, the accuracy of deciding the player taking a card was 75%.
著者
Shotaro Usuzaki Yuki Arikawa Hisaaki Yamaba Kentaro Aburada Shin-Ichiro Kubota Mirang Park Naonobu Okazaki
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.26, pp.257-266, 2018 (Released:2018-03-15)
参考文献数
18

Distributed Denial-of-Service (DDoS) attack detection systems are classified into a signature based approach and an anomaly based approach. However, such methods tend to suffer from low responsiveness. On the other hand, real-time burst detection which is used in data mining offers two advantages over traditional statistical methods. First, it can be used for real-time detection when an event is occurring, and second, it can work with less processing as information about events are compressed, even if a large number of events occur. Here, the authors add the function for attack detection in real-time burst detection technique, and propose a highly responsive DDoS attack detection technique. This paper performs experiments to evaluate its effectiveness, and discusses its detection accuracy and processing performance.
著者
Yuhei Watanabe Takahiro Iriyama Masakatu Morii
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.25, pp.288-295, 2017 (Released:2017-03-15)
参考文献数
16

WEP has serious vulnerabilities, and they cause various key recovery attacks. Although a more secure protocol such as WPA2 is recommended, according to each research by IPA and Keymans NET, WEP is still widely used because of the lack of knowledge about security of the wireless LAN. On the other hand, it takes large costs to replace a wireless LAN equipment in large-scale facilities. They need a secure method which can be used on their equipment by updating the firmware of WEP. In 2011, Morii, one of us, et al. showed IVs which prevented the Klein attack, the PTW attack, and the TeAM-OK attack. However, they did not present how to obtain such IVs and evaluate security of them. This paper shows the secure method of WEP and how to use it as fast as WEP. We show an IV which prevents the establishment of previous key recovery attacks. Moreover, we show how to use our IV efficiently on the operation of WEP. Our method requires about 1.1 times the processing time for the encryption than WEP. As a result, our method can prevent previous key recovery attacks and realize communication as fast as WEP.
著者
Michiaki Yasumura Katsuhiko Yuura Masaaki Kurosu Toshihisa Aoshima Nobuyuki Takeichi Yoshimitsu Oshima
出版者
一般社団法人情報処理学会
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.13, no.3, pp.296-303, 1990-11-10

We have developed a Lisp system based on Common Lisp on a main-frame computer. It is called HiLlSP which is the acronym of Hitachi's interactive Lisp Processor or High speed Lisp. We have designed L-code as an abstract Lisp machine code that is used both for the interpreter and the compiler. The HiLISP interpreter executes heavy Common Lisp features such as lexical scope and multiple values efficiently. The HiLISP compiler optimizes compiled code by employing several optimization techniques such as program transformations type inferences and local optimizations. HiLISP system also provides a full screen editor and a full-fledged debugger. The most notable extension to Common Lisp is the Japanese character set handling feature. Based on our prototype implementation a software product called VOS3 Lisp was developed and delivered as the first commercial Common Lisp system in Japan. HiLISP has been used for many applications such as diagnostic expert system for LSI process logic design system layout CAD natural language processing system and so on. Based on the HiLISP system an object oriented system and an interactive program transformation system have been also developed.We have developed a Lisp system based on Common Lisp on a main-frame computer. It is called HiLlSP, which is the acronym of Hitachi's interactive Lisp Processor or High speed Lisp. We have designed L-code as an abstract Lisp machine code that is used both for the interpreter and the compiler. The HiLISP interpreter executes heavy Common Lisp features, such as lexical scope and multiple values efficiently. The HiLISP compiler optimizes compiled code by employing several optimization techniques such as program transformations, type inferences, and local optimizations. HiLISP system also provides a full screen editor and a full-fledged debugger. The most notable extension to Common Lisp is the Japanese character set handling feature. Based on our prototype implementation, a software product called VOS3 Lisp was developed and delivered as the first commercial Common Lisp system in Japan. HiLISP has been used for many applications, such as diagnostic expert system for LSI process, logic design system, layout CAD, natural language processing system, and so on. Based on the HiLISP system, an object oriented system and an interactive program transformation system have been also developed.
著者
Takuya Kuwahara Yukino Baba Hisashi Kashima Takeshi Kishikawa Junichi Tsurumi Tomoyuki Haga Yoshihiro Ujiie Takamitsu Sasaki Hideki Matsushima
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.26, pp.306-313, 2018 (Released:2018-03-15)
参考文献数
17
被引用文献数
19

Modern vehicles are equipped with Electronic Control Units (ECUs) and external communication devices. The Controller Area Network (CAN), a widely used communication protocol for ECUs, does not have a security mechanism to detect improper packets; if attackers exploit the vulnerability of an ECU and manage to inject a malicious message, they are able to control other ECUs to cause improper operation of the vehicle. With the increasing popularity of connected cars, it has become an urgent matter to protect in-vehicle networks against security threats. In this paper, we study the applicability of statistical anomaly detection methods for identifying malicious CAN messages in in-vehicle networks. We focus on intrusion attacks of malicious messages. Because the occurrence of an intrusion attack certainly influences the message traffic, we focus on the number of messages observed in a fixed time window to detect intrusion attacks. We formalize features to represent a message sequence that incorporates the number of messages associated with each receiver ID. We collected CAN message data from an actual vehicle and conducted a quantitative analysis of the methods and the features in practical situations. The results of our experiments demonstrated our proposed methods provide fast and accurate detection in various cases.
著者
Tatsuya Abe Toshiyuki Maeda
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.25, pp.244-255, 2017 (Released:2017-02-15)
参考文献数
49
被引用文献数
5

Relaxed memory consistency models specify effects of executions of statements among threads, which may or may not be reordered. Such reorderings may cross loop iterations. To the best of our knowledge, however, there exists no concurrent program logic which explicitly handles the reorderings across loop iterations. This paper provides concurrent program logic for relaxed memory consistency models that can represent, for example, total store ordering, partial store ordering, relaxed memory ordering, and acquire and release consistency. There are two novel aspects to our approach. First, we translate a concurrent program into a family of directed acyclic graphs with finite nodes and transitive edges called program graphs according to a memory consistency model that we adopt. These represent dependencies among statements which represent reorderings of not only statements but also visibility of their effects. Second, we introduce auxiliary variables that temporarily buffer the effects of write operations on shared memory, and explicitly describe the reflections of the buffered effects to shared memory. Specifically, we define a small-step operational semantics for the program graphs with the introduced auxiliary variables, then define sound and relatively complete logic to the semantics.
著者
EricS.Fukuda Hiroaki Inoue Takashi Takenaka Dahoo Kim Tsunaki Sadahisa Tetsuya Asai Masato Motomura
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.23, no.2, pp.143-152, 2015-03-15

Memcached has been widely accepted as a technology to improve the response speed of web servers by caching data on DRAMs in distributed servers. Because of its importance, the acceleration of memcached has been studied on various platforms. Among them, FPGA looks the most attractive platform to run memcached, and several research groups have tried to obtain a much higher performance than that of CPU out of it. The difficulty encountered there, however, is how to manage large-sized memory (gigabytes of DRAMs) from memcached hardware built in an FPGA. Some groups are trying to solve this problem by using an embedded CPU for memory allocation and another group is employing an SSD. Unlike other approaches that try to replace memcached itself on FPGAs, our approach augments the software memcached running on the host CPU by caching its data and some operations at the FPGA-equipped network interface card (NIC) mounted on the server. The locality of memcached data enables the FPGA NIC to have a fairly high hit rate with a smaller memory. In this paper, we describe the architecture of the proposed NIC cache, and evaluate the effectiveness with a standard key-value store (KVS) benchmarking tool. Our evaluation shows that our system is effective if the workload has temporal locality but does not handle workloads well without such a characteristic. We further propose methods to overcome this problem and evaluate them. As a result, we estimate that the latency improved by up to 3.5 times over software memcached running on a high performance CPU.Memcached has been widely accepted as a technology to improve the response speed of web servers by caching data on DRAMs in distributed servers. Because of its importance, the acceleration of memcached has been studied on various platforms. Among them, FPGA looks the most attractive platform to run memcached, and several research groups have tried to obtain a much higher performance than that of CPU out of it. The difficulty encountered there, however, is how to manage large-sized memory (gigabytes of DRAMs) from memcached hardware built in an FPGA. Some groups are trying to solve this problem by using an embedded CPU for memory allocation and another group is employing an SSD. Unlike other approaches that try to replace memcached itself on FPGAs, our approach augments the software memcached running on the host CPU by caching its data and some operations at the FPGA-equipped network interface card (NIC) mounted on the server. The locality of memcached data enables the FPGA NIC to have a fairly high hit rate with a smaller memory. In this paper, we describe the architecture of the proposed NIC cache, and evaluate the effectiveness with a standard key-value store (KVS) benchmarking tool. Our evaluation shows that our system is effective if the workload has temporal locality but does not handle workloads well without such a characteristic. We further propose methods to overcome this problem and evaluate them. As a result, we estimate that the latency improved by up to 3.5 times over software memcached running on a high performance CPU.
著者
Jun Liu Kensuke Fukuda
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.26, pp.148-157, 2018 (Released:2018-02-15)
参考文献数
35
被引用文献数
1

To enhance Internet security, researchers have largely emphasized diverse cyberspace monitoring approaches to observe cyber attacks and anomalies. Among them darknet provides an effective passive monitoring one. Darknets refer to the globally routable but still unused IP address spaces. They are often used to monitor unexpected incoming network traffic, and serve as an effective network traffic measurement approach for viewing certain remote network security activities. Previous works in this field discussed possible causes (i.e., anomalies) of darknet traffic and applied their classification schemes on short-term traces. Our interest lies, however, in how darknet traffic has evolved and the effectiveness of a darknet traffic taxonomy for longitudinal data. To reach these goals, we propose a simple darknet traffic taxonomy based on network traffic rules, and evaluate it with two darknet traces: one covering 12 years since 2006, while the other covering 11 years since 2007. The evaluation results reveal the effectiveness of this taxonomy: we are able to label over 94% of all source IPs with anomalies defined by the taxonomy, leaving the unlabeled source ratio low. We also examine the evolution of different anomalies since 2006 (especially in recent years), analyze the temporal and spatial dependency and parameter dependency of darknet traffic, and conclude that most sources in the datasets are characterized by just one or two anamalies with simple attack mechanisms. Moreover, we compare the taxonomy with a one-way traffic analysis tool (i.e., iatmon) to better understand their differences.
著者
Xuan Thien Phan Kensuke Fukuda
出版者
Information Processing Society of Japan
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.25, pp.182-190, 2017 (Released:2017-02-15)
参考文献数
29
被引用文献数
18

Fine-grained network traffic monitoring is important for efficient network management in software-defined networking (SDN). The current SDN architecture, i.e., OpenFlow, relies on counters in the flow entries of forwarding tables for such monitoring tasks. This is not efficient nor flexible since the packet-header fields that users aim for monitoring are not always the same or overlap with those in OpenFlow match fields, which is designed for forwarding as a higher priority. This inflexibility may result in unnecessary flow entries added to switches for monitoring and controller-switch monitoring-based communication overhead, which may cause the communication channel to become a bottleneck, especially when the network includes a large number of switches. We propose SDN-Mon, a SDN-based monitoring framework that decouples monitoring from existing forwarding tables, and allows more fine-grained and flexible monitoring to serve a variety of network-management applications. SDN-Mon allows the controller to define the arbitrary sets of monitoring match fields based on the requirements of controller applications to flexibly monitor traffic. In SDN-Mon, some monitoring processes are selectively delegated to SDN switches to leverage the computing processor of the switch and avoid an unnecessary overhead in the controller-switch communication for monitoring. We implemented SDN-Mon and evaluated its performance on Lagopus switch, a high-performance software switch.
著者
Jonas Kölker
出版者
一般社団法人 情報処理学会
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.20, no.3, pp.694-706, 2012 (Released:2012-07-15)
参考文献数
8
被引用文献数
2 15

In a Kurodoko puzzle, one must colour some squares in a grid black in a way that satisfies non-overlapping, non-adjacency, reachability and numeric constraints specified by the numeric clues in the grid. We show that deciding the solvability of Kurodoko puzzles is NP-complete.
著者
Kazunori Fujiwara Akira Sato Kenichi Yoshida
出版者
一般社団法人 情報処理学会
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.21, no.3, pp.517-526, 2013 (Released:2013-07-15)
参考文献数
11
被引用文献数
5

The Domain Name System (DNS) is a key naming system used in the Internet. Recently, the deployment of IPv6 (especially after the World IPv6 Launch) and DNS prefetching in web browsers has significantly changed DNS usage. Furthermore, content delivery networks (CDNs) use complicated DNS configurations together with small TTL values to control their traffic. These three factors significantly increase DNS traffic. Thus, the importance of DNS traffic analysis has been increasing to properly maintain DNS operations. This paper presents an analysis of DNS full resolver traffic at the University of Tsukuba in Japan. What we found are 1) The deployment of IPv6 has increased queries from clients as much as 41%, 2) The deployment of CDNs increases the use of small TTL values, the use of CNAME resource records and the use of out-of-bailiwick DNS server names. Since these increases are making the DNS cache hit rate low and the DNS response slow without recognition by Internet users, this paper seeks to warn application designers of potential system design risks in current Internet applications.
著者
Kazuya Murao Junna Imai Tsutomu Terada Masahiko Tsukamoto
出版者
一般社団法人 情報処理学会
雑誌
Journal of Information Processing (ISSN:18826652)
巻号頁・発行日
vol.25, pp.59-66, 2017 (Released:2017-01-15)
参考文献数
16
被引用文献数
6

There have been several studies on object detection and activity recognition on a table conducted thus far. Most of these studies use image processing with cameras or a specially configured table with electrodes and an RFID reader. In private homes, methods using cameras are not preferable since cameras might invade the privacy of inhabitants and give them the impression of being monitored. In addition, it is difficult to apply the specially configured system to off-the-shelf tables. In this work, we propose a system that recognizes activities conducted on a table and identifies which user conducted the activities with load cells only. The proposed system uses four load cells installed on the four corners of the table or under the four legs of the table. User privacy is protected because only the data on actions through the load cells is obtained. Load cells are easily installed on off-the-shelf tables with four legs and installing our system does not change the appearance of the table. The results of experiments using a table we manufactured revealed that the weight error was 38g, the position error was 6.8cm, the average recall of recognition for four activities was 0.96, and the average recalls of user identification were 0.65 for ten users and 0.89 for four users.