著者
Gui-Ying Liu Wei-Jun Chen Min Zhao
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.20, no.1, pp.20220473, 2023-01-10 (Released:2023-01-10)
参考文献数
30

Based on an auxiliary differential equation (ADE) and new weighted Laguerre polynomials (WLPs), an efficient 3-D finite-difference time-domain method (FDTD) with factorized-splitting (FS) scheme is proposed to calculate wave propagation in general dispersive materials. The ADE technique is introduced to model general dispersive materials. Using a new temporal basis, the new WLPs can improve computational efficiency and save computing resources. The FS scheme is used to efficiently solve the huge sparse matrix equation. A numerical example is given to verify the accuracy and the efficiency of the proposed method. The results show its superiority compared with existing methods.
著者
Xu Xie Yuhang Wang Qin Wu Zhi Huang
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.24, pp.20220342, 2022-12-25 (Released:2022-12-25)
参考文献数
31
被引用文献数
1

Based on the study of the electric double layer interface changes and the influence of the geomagnetic field during the underwater motion of the towed antenna, the formation mechanism of the motion polarization noise and motion-induced noise caused by the antenna motion is explained, and the corresponding relationship between the motion noise and the motion acceleration of the towed antenna is analyzed. Experiments are designed and verified. The results show that the movement of the towed antenna in the conductive medium will increase the low-frequency noise level of the antenna, which is mainly concentrated below 300Hz, and the noise floor increases more obviously with the increase of the movement rate. In addition, the low-frequency noise introduced by the antenna motion is controlled by the motion fluctuation frequency, and the noise frequency is the same as the motion acceleration frequency, which is consistent with the theoretical analysis.
著者
Zhiqiang Wang Xin Liu Zhiqiang Li Xiaosong Wang Minghua Wang Quan Li Yan Li Yu Liu
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.23, pp.20210286, 2022-12-10 (Released:2022-12-10)
参考文献数
35
被引用文献数
1

This paper presents a four-way current-combining Ka-band power amplifier (PA) in 65-nm CMOS technology. A symmetrical, transmission line based four-way current combiner, together with output transformers, is used to transfer the high load impedance (4*ZL) to the desired Zopt for each power unit cell. Besides, both interstage/input flexible matching transformers and the power splitter are optimized to improve the performance. Based on the methodology mentioned above, the power amplifier demonstrates a small-signal gain of about 24.12 dB, a saturated output power of 21.56 dBm, and a peak power-added efficiency of 27.3% at 35GHz.
著者
Haoran Sun Yinhang Zhang Xi Yang
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.22, pp.20220429, 2022-11-25 (Released:2022-11-25)
参考文献数
32
被引用文献数
4

This paper presents a wide rate range receiver including adaptive continuous time linear equalizer (CTLE) and loop-unrolled half rate decision feedback equalizer (DFE). A hybrid filter is adopted to expand the rate range of adaptive CTLE with spectrum balancing technology. The current-integrating summer is introduced to reduce the power of half-rate loop-unrolled DFE. The post-simulation is carried out by 0.18µm CMOS TSMC technology and the results show that the rate range of adaptive CTLE can reach to 6.25-10Gb/s. When the 10 Gb/s PRBS7 signal is transmitted through the 18-inch FR4 backplane with 15.451dB loss at Nyquist frequency, the eye diagram is obviously open and its horizontal opening is about 0.9UI.
著者
Yifei Kang Chunmiao Ma Simin Wang Weiguo Wu Kun Zhao
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.21, pp.20220291, 2022-11-10 (Released:2022-11-10)
参考文献数
32
被引用文献数
1

Nowadays, data centers are critical infrastructure for the information industry. Thermal security is one of the most concerning problems of the data center efficiently providing service. The temperature prediction method is an effective way, which overcomes the lagging of the feedback control and rewards a high prediction accuracy. While the current LSTM based prediction methods are limited in accuracy and restricted in scalability due to the lack of knowledge of physical properties and consideration of time constant differences of features. To address this, we propose a data center temperature prediction model with two-segment LSTM for prediction separately for IT equipment load and other heat-related variables with different time constants. The model takes into account the physical properties of the equipment and achieves higher prediction accuracy. The experimental results show that the prediction accuracy of our method is 27.27% higher than the state-of-art single segment LSTM method.
著者
Subramaniyan Geethanjali Krishnasamy Vijayakumar
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.20, pp.20220343, 2022-10-25 (Released:2022-10-25)
参考文献数
30
被引用文献数
5

Escalating fuel prices and a keen attention to improve air quality have resulted in proliferation of pure electric and hybrid electric vehicles. Fuel savings and reduced carbon footprint are the main enablers for the choice of electric automobiles compared to the conventional vehicles with internal combustion engines. Availability of electric power sources such as lightweight battery packs also has promoted electric drive as a viable option. Both plug-in electric and hybrid vehicles necessitate new power train schemes ensuring safe and reliable operation. The DC-DC converters are the heart of an electric vehicle. They are used to convert the battery voltage to another level as required by the motor drive. Traditionally, most of the automakers use buck boost converter as it enables the bidirectional operation. This paper presents a comprehensive analysis of a dual way DC-DC converter namely split pi converter for an electric vehicle drive train system driving an inverter fed induction motor. The dual way converter investigated has numerous advantages such as inherent bidirectional capability, EMI reduction and reduction of the passive elements. Simulation results and experimental investigations based on a laboratory prototype are presented.
著者
Yingxiang Gong Zile Fan
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
pp.19.20220431, (Released:2022-10-18)
参考文献数
41
被引用文献数
1

How to replace the referee in sports with artificial intelligence has attacked a huge amount of attention recently. In this paper, non-battery pressure detection and communication system are designed and fabricated aiming to help the referee in the basketball games. To get the information from player and ball at the same time, the designed system is consisted of three parts, including the basketball monitoring system, the shoes monitoring system, and the laptop to collect and process the data. For the basketball monitoring system, eight piezoelectric polyvinylidene fluoride (PVDF) flexible thin films are used as the sensor on the surface of the basketball with the sensitivity of 0.065 V/N and four hard piezoelectric Lead Zirconium titanite (PZT) patches are set inside the ball as the power source. As for the shoes monitoring system, four PZT patches work as both power source and pressure sensor with a sensitivity of 0.025 V/N. To solve the referee problem in basketball game, time delay of different systems is first measured. The different systems have similar time delay of about 3s, which will help to make sure whether the players break the rules. In this paper, whether the player has a traveling violation in a game can be refereed by the collected data, which has more than 97% accuracy. This work shows an innovative progress in automatic referees in games and the Internet of Things (IoT) in the human health monitoring.
著者
Chenfeng Li Chao Chen Xiaodong Su
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.19, pp.20220348, 2022-10-10 (Released:2022-10-10)
参考文献数
30
被引用文献数
1

This paper presents a low-power fractional-N synthesizer for BLE with a gate-switching charge pump (CP) and high-speed prescaler. To reduce the current mismatch under low supply voltage, a master-slave rail-to-rail operational trans-conductance amplifier (OTA) structure is employed to the CP; Current self-matching technique guarantees the charging current is equal to discharging current. The embedded logic gates and power switch technique are employed to true-single-phase-clock (TSPC) to reduce power consumption and improve the operating speed of the divider. Random dither is injected into the ΔΣ modulator to prolong the period of output sequence. The proposed phase-locked loop (PLL) is implemented in the 40-nm CMOS process. It achieves -85.94dBc/Hz@100kHz and -109.18dBc/Hz@1MHz in fractional-N mode while consuming 1.6mW under a 0.7V voltage supply.
著者
Puqing Yang Zhaofeng Zhang
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.18, pp.20220337, 2022-09-25 (Released:2022-09-25)
参考文献数
31
被引用文献数
2

This paper presents a novel first-order noise-shaping successive approximation register (SAR) analog-to-digital converter (ADC) for passive wireless sensor node application. To decrease dynamic power consumption, one-side switching instead (OSSI) method and higher-bit switching instead (HBSI) method are adopted in our proposed noise-shaping architecture. Dynamic SAR logic and dynamic comparator are used to further reduce power consumption. In addition, a low supply voltage is applied to this ADC, which can decrease static current leakage. The proposed noise-shaping SAR ADC was fabricated in 0.18um 1P4M CMOS technology, which occupies an active area of 0.185mm2. The prototype chip consumes 89nW at 25kHz sampling rate. The measurement shows 58.2dB signal to noise and distortion ratio (SNDR) can be achieved.
著者
Yu-Liang Lin Cheng-Chien Kuo Chung-Ming Leng Chein-Chung Sun
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.16, pp.20220178, 2022-08-25 (Released:2022-08-25)
参考文献数
32
被引用文献数
2

A LED driver with a high Power Factor (PF) under universal AC voltage input is investigated in this paper. The AC/DC buck converter with novel dual sampling loop feedback control is adopted to implement the LED driver application. When the main switch is on interval, the control loop does peak current sampling. When main switch is off interval, the control loop does average current sampling. Two control sampling loops are superimposed to regulate the main switch to adapt the AC input voltage and load alteration. Such a scheme can keep the characteristic of peak current control of fast response and avoid the control delay to bring about over current for damage LED. Compared with the conventional peak current control method, the proposed design does not need zero current detect winding and multiplier. Therefore, the circuit architecture of the proposed driver is cheaper. The proposed driver is applied to a 12W LED to analyze the operational principles and verify the practicality.
著者
Kwon Sang Wook Yong Seo Koo
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.15, pp.20220221, 2022-08-10 (Released:2022-08-10)
参考文献数
32
被引用文献数
4

The transient response characteristics such as overshoot and undershoot can be affected by the external capacitors of the LDO regulator. However, the capacitor-less LDO regulator proposed in this paper has an SR-Latch switch structure applied to the output terminal and gate terminal of the pass transistor in order to achieve improved transient response and secure excellent current driving capability. In addition, the proposed ESD protection device uses Penta-Well in low voltage applications embedded in the output stage and power line based on SCR (Silicon Control Rectifier) to provide improved ESD robustness characteristics. As a result, the transient response characteristics of the proposed LDO regulator with the SR-Latch switch structure were improved and the quiescent current was secured. The operating conditions of the proposed LDO regulator with the SR-Latch switch structure were set to an input voltage of 3.3V to 4.5V, maximum load current of 250mA, and an output voltage of 3V. As a result of the measurement, it was confirmed that the proposed LDO regulator maintained an undershoot voltage of 42mV and an overshoot voltage of 31mV when a load current of 250mA was applied. In addition, HBM ESD robustness is guaranteed at 6kV.
著者
Hsin-Chuan Chen Rong-San Lin
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
pp.10.20130656, (Released:2013-09-24)
参考文献数
5
被引用文献数
3

H-bridges are important driving components for consumer electronics and industry controls. They also play an important role in technologies related to DC motor control. Conventional H-bridge drivers require dead-time generation to avoid the shoot-through current resulting from both upper and lower power transistors being turned on concurrently. Unlike the conventional H-bridge driver, this paper proposes an H-bridge driver based on a complementary MOSFET type using gate bias, without a dead time generator, to improve its driving efficiency. Moreover, this proposed H-bridge driver also has a reduced hardware complexity.
著者
Wenyu Ma Wenquan Cao Yixin Tong Bangning Zhang
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.13, pp.20220184, 2022-07-10 (Released:2022-07-10)
参考文献数
31
被引用文献数
2

A slot antenna array backed by substrate integrated waveguide (SIW) cavity with high gain, wideband and low sidelobe levels (SLLs) is proposed in this letter. Four 2×2 slots antenna elements based on SIW cavity are used as the radiation structure. A broadband SIW corporate-feed network is equipped on the bottom layer to feed antenna array. Due to the broadband characteristics of antenna element and feed network, antenna array with wide band is obtained. Then, through the dislocation distribution of antenna elements, the SLLs of antenna array can get greatly reduced. A prototype has been fabricated using standard PCB process, and measured for verification. As for the measurement results, the impedance bandwidth below -10dB is from 18.2GHz to 21.7GHz (17.5%). The maximum gain is 17.4dBi at 20.5GHz. Most importantly, the SLLs of both E- and H-plane are all lower than -15dB in the working band.
著者
Haohan Yang Heng You Shushan Qiao
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.12, pp.20220157, 2022-06-25 (Released:2022-06-25)
参考文献数
30
被引用文献数
2

An efficiency-enhanced fully integrated power amplifier (PA) for wireless local area networks (WLANs) was implemented based on the GaAs heterojunction bipolar transistor (HBT) process. A harmonic tuning network that can absorb the parasitic inductance of the bonding wires is proposed, which reduces the chip area significantly. The network provides nearly optimum fundamental and second harmonic impedances from 5.0 to 5.5GHz. Additionally, a novel adaptive bias circuit that corrects the AM-AM and AM-PM distortion and improve thermal stability at high input power was proposed. With a chip dimension of only 1.06mm2, the PA achieves a gain of 31.1-31.6dB and saturated power of 29.9-30.3dBm with a peak power-added efficiency (PAE) of 49.3%-51.8% across 5.0-5.5GHz. The PA also shows an output power of 22.1dBm (EVM=-32dB) with 18.4% PAE under an 802.11ac MCS9 VHT160 test signal. In addition, the PA delivers 17.5dBm (EVM=-42dB) output power when tested with the 802.11ax MCS11 VHT160 signal at 5.25GHz.
著者
Zhi Li Huidong Zhao Jialu Yin Shushan Qiao Yumei Zhou
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.19, no.11, pp.20220102, 2022-06-10 (Released:2022-06-10)
参考文献数
30
被引用文献数
2

A fully integrated CMOS RC oscillator is presented. The oscillator is inverter-based. An adaptive body biasing (ABB) scheme is proposed to regulate the trip point of the decision inverter adaptively, thus alleviating the frequency variation over PVT. To achieve low power consumption all components are in the sub-threshold region. The circuit is designed in a 55-nm CMOS process with an area of 0.052mm2. The simulation result shows a temperature sensitivity of 59ppm/°C from -40∼125°C which achieves a 72ppm/°C reduction as compared to an oscillator without ABB. the oscillator operates at 33kHz and consumes 183nW from a 0.6V supply.
著者
Yong Zhang Ning Wu Fang Zhou Xiaoqiang Zhang Jinbao Zhang
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.15, no.14, pp.20180559, 2018 (Released:2018-07-25)
参考文献数
14
被引用文献数
2 4

This paper proposes a FPGA based efficient implementation of AES-GCM for wireless applications. For AES engine, we apply the DACSE algorithm to achieve a compact S-box. A new pipeline strategy is present to improve the throughput of AES engine without bring in extra resource consumption. For GHASH core, FR-KOA algorithm is present to implement a finite field multiplier (FFM). In addition, a 6-stage pipeline strategy is used to improve the FFM throughput. The proposed FR-KOA FFM can match the high-efficiency AES we designed to achieve the highly efficient AES-GCM. FPGA implementation on Xilinx FPGA, Virtex5 xc5vlx85 yielded a throughput value of 48.8 Gbps covering area of 6482 slices. The efficiency of our implementation is 7.54 Mbps/Slice which is higher than the previous works.
著者
Atsushi Oshiro Naoki Nishigami Takumi Yamamoto Yosuke Nishida Julian Webber Masayuki Fujita Tadao Nagatsuma
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
pp.18.20210494, (Released:2021-12-07)
参考文献数
30
被引用文献数
10

In modern optical communications, pulse amplitude modulation 4 (PAM4) is employed to achieve higher data rates than that achieved by conventional non-return-to-zero format. Meanwhile, there is an increasing interest to convert wired connections to wireless in data centers using high-speed millimeter-wave and terahertz (THz) links. Here, we introduced the PAM4 modulation for THz wireless communications using a resonant tunneling diode (RTD) receiver. Compared with a Schottky-barrier diode receiver, the RTD receiver has higher sensitivity, and a stronger nonlinearity at low input power when it is operated with an amplified detection scheme. We achieved 24-Gbaud (48-Gbit/s) transmission in the 300-GHz band with a quasi-real-time digital signal processing (DSP), which is the fastest PAM4 wireless communication without an offline DSP to the best of our knowledge.
著者
Daying Sun Shen Xu Weifeng Sun Shengli Lu
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.11, no.14, pp.20140493, 2014 (Released:2014-07-25)
参考文献数
11

A novel digital control algorithm for a single-phase boost power factor correction (PFC) converter with fast dynamic response is presented. Based on the converter circuit structure, the track of the output voltage and the inductor current of next switching cycle is estimated in advance. The self-adjusting voltage control loop is adopted to improve the static and dynamic voltage regulation. Meanwhile, the current control loop is implemented only by the estimated output voltage and inductor current values, which simplifies the control loop and reduces the digital calculation burden. The single-phase boost PFC converter with the proposed digital control algorithm has been implemented via the field programmable gate array (FPGA). Experimental results indicate that the proposed control algorithm can improve the power factor, as well as the dynamic response of boost PFC converter simultaneously. The power factor is optimized more than 0.98, and the recovery time is less than 4 line cycles with small overshoot.
著者
Jiafei Zhao Le Zou Rongkun Jiang Xuetian Wang Hongmin Gao
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.17, no.2, pp.20190687, 2020 (Released:2020-01-25)
参考文献数
31
被引用文献数
2 5

An antenna array system with high angular resolution is proposed to adapt the demands of both medium-range radar (MRR) and long-range radar (LRR) detections for 77 GHz automotive radars. Both the MRR and LRR modes are integrated into one substrate based on the optimized sparse array topology, which makes full use of the antenna aperture size to improve the angular resolution of the proposed system. Two-dimensional series-fed weighting arrays are designed via the Taylor synthesis method to effectively heighten the antenna gain and restrain the sidelobe level. After completing the fabrication, measurement results of the proposed antenna array are in good agreement with the simulation results. Moreover, the angular resolution is verified to be 0.5° by adopting the coherent signal space method (CSM) with stepped frequency transmitting waveform, which validates the effectiveness of the proposal.
著者
Hiroyuki Tsuda
出版者
The Institute of Electronics, Information and Communication Engineers
雑誌
IEICE Electronics Express (ISSN:13492543)
巻号頁・発行日
vol.17, no.22, pp.20202002, 2020-11-25 (Released:2020-11-25)
参考文献数
77
被引用文献数
7

This paper reviews recent progress in silicon photonics and compares it with other optical device platforms. The key components for optical communication systems, including arrayed waveguide gratings, optical switches, modulators and optical functional devices fabricated on silicon photonics platforms are explained. The integration of III-V compounds, lithium niobate, polymers, phase change and other functional materials are necessary to strengthen silicon photonics platforms. These are also reviewed, and the feasibilities are discussed. Finally, I express my personal view as to the best research direction for silicon photonics.